sobel

所属分类图形图象
开发工具:VHDL
文件大小:576KB
澳门威尼斯人官网次数:578
上传日期:2008-05-05 18:14:07
上 传 者李永杰
说明:  图像边缘检测的VERILOG实现,能准确检测图像边缘
(Image Edge Detection of Verilog realize that can accurately detect image edge)

文件列表:[ 举报垃圾]
sobel
.....\
..... \db
.....\..\DE2_CCD. db_info
.....\..\DE2_CCD.eco. cdb
.....\..\DE2_CCD.sld_design_entry. sci
.....\DE2_CCD.asm. rpt
.....\
.....\DE2_CCD. done
.....\
.....\DE2_CCD.fit. eqn
.....\DE2_CCD.fit. rpt
.....\
.....\DE2_CCD.fit. summary
.....\DE2_CCD.flow. rpt
.....\DE2_CCD.map. eqn
.....\DE2_CCD.map. rpt
.....\
.....\DE2_CCD.map. summary
.....\
.....\DE2_CCD. pof
.....\DE2_CCD. qpf
.....\
.....\DE2_CCD.qsf. bak
.....\
.....\DE2_CCD. sof
.....\
.....\DE2_CCD.tan. rpt
.....\DE2_CCD.tan. summary
.....\
.....\DE2_CCD.v. bak
.....\
.....\
.....\I2C_CCD_Config.v. bak
.....\
.....\
.....\
.....\
.....\
.....\Mirror_Col.v. bak
.....\
.....\
.....\
..... \Sdram_Control_4Port
.....\...................\
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.....\
.....\
.....\
.....\
.....\sobel.v. bak
.....\sopc_builder_debug_log. txt
.....\
.....\VGA_Audio_PLL. bsf
.....\
.....\

.....\VGA_Audio_PLL_waveforms. html
.....\
.....\

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